Publications

On DBLP, Scholar, or as Bibtex.

Topic Area	Reference
Shared Memory Multiprocessor Design	[BEH+17] [Elv16] [HKE+16] [EN15] [EN14] [RNSE13] [Elv12]
Verification and Test	[EMV+20], [EBJN18] [BEH+17] [Elv16] [EN16]
Concurrency Models	[Elv16] [EN15] [RNSE13]
Tools and Methodologies	[EMV+20], [EBJN18], [SEB13]

Conference and Journal Papers

[EBJN18] (1,2)

Marco Elver, Christopher J. Banks, Paul Jackson, and Vijay Nagarajan. VerC3: A Library for Explicit State Synthesis of Concurrent Systems. In Design, Automation and Test in Europe (DATE). Dresden, Germany, IEEE, March 2018. [pdf], [website].

[BEH+17] (1,2)

Christopher J. Banks, Marco Elver, Ruth Hoffmann, Susmit Sarkar, Paul Jackson, and Vijay Nagarajan. Verification of a lazy cache coherence protocol against a weak memory model. In International Conference on Formal Methods in Computer-Aided Design (FMCAD). Vienna, Austria, October 2017. [pdf], [website].

[HKE+16]

Cheng-Chieh Huang, Rakesh Kumar, Marco Elver, Boris Grot, and Vijay Nagarajan. C3D: Mitigating the NUMA Bottleneck via Coherent DRAM Caches. In IEEE/ACM International Symposium on Microarchitecture (MICRO). Taipei, Taiwan, October 2016. [pdf], [website].

[EN16]

Marco Elver and Vijay Nagarajan. McVerSi: A Test Generation Framework for Fast Memory Consistency Verification in Simulation. In IEEE International Symposium on High Performance Computer Architecture (HPCA). Barcelona, Spain, March 2016. [pdf], [talk], [website].

[EN15] (1,2)

Marco Elver and Vijay Nagarajan. RC3: Consistency directed cache coherence for x86-64 with RC extensions. In International Conference on Parallel Architectures and Compilation Techniques (PACT). San Francisco, CA, USA, October 2015. [pdf].

[EN14]

Marco Elver and Vijay Nagarajan. TSO-CC: Consistency directed cache coherence for TSO. In IEEE International Symposium on High Performance Computer Architecture (HPCA). Orlando, FL, USA, February 2014. [pdf], [talk], [website].

[RNSE13] (1,2)

Bharghava Rajaram, Vijay Nagarajan, Susmit Sarkar, and Marco Elver. Fast RMWs for TSO: Semantics and implementation. In ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI). Seattle, WA, USA, June 2013. [pdf].

[SEB13]

Jean-Luc Stevens, Marco Elver, and James A. Bednar. An automated and reproducible workflow for running and analysing neural simulations using Lancet and IPython Notebook. Frontiers in Neuroinformatics, 2013. [pdf].